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Quartus circuit design and FPGA programming VHDL/Verilog
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Engineering & Manufacturing > Electrical

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  • Posted: Mon, Aug 20, 2012
  • Time Left: Closed
  • Location: Anywhere
  • Client prefers freelancers from:
    Anywhere

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    The client prefers freelancers from
    a different location.

    You're still able to submit a proposal for this job, regardless of your location.
  • Start: Immediately
  • Hourly Rate: $10 - $15 / hr
  • Hrs/wk: Not Sure | Duration: 5 hrs
  • Work View™ Payment Protection
  • W9 Not Required
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Model project for an engineering student with experience in DSP and FPGAs, Quartus and Altera boards. Details to be provided after interviewing. Contract to be extended on successful completion of this model job.

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Job ID: 32865088
Proposals
Hourly Rate: Avg $ | High $ | Low $ — Show Pricing
  • Submit Date (Latest)

Mansoor N.      
Mansoor N.'s identity has been verified.  Learn More
 Pakistan  |  
8+ years of experience working with electronics product design. I have worked on microcontroller firmware (AVR, PIC, MCS51), DSP (TI C67x, C64x),...
1
  |  
 0.0   |  Private   |  0 Jobs
Bid ID: 32977922  |  Submitted: Aug 24, 2012 06:30 ET 
Proposal SEALED

 Egypt  |  
I am an electronic engineer with a strong digital design background , i have more than 5 years of Experience in FPGA and CPLD programming(both...
3
  |  
 4.9   |  $4,351 Earnings   |  7 Jobs
Bid ID: 32934130  |  Submitted: Aug 22, 2012 16:19 ET 
Proposal SEALED

 United States  |  
INVITED
Digital Design Engineer with over three years of FPGA & CPLD design work. Experience with Altera, Xilinx, and Modelsim
1
  |  
 0.0   |  $0 Earnings   |  0 Jobs
Bid ID: 32912147  |  Submitted: Aug 22, 2012 00:42 ET 
Proposal SEALED

 Egypt  |  
I can design and optimize an IP from scratch on the hardware or redesign an existing IP to optimize the used hardware resources.
1
  |  
 0.0   |  $0 Earnings   |  0 Jobs
Bid ID: 32911899  |  Submitted: Aug 22, 2012 00:29 ET 
Proposal SEALED

 Russia  |  
Work background: Creating and implementation of a data processing algorithms Design of digital-to-analog and analog-to-digital high...
2
  |  
 0.0   |  $0 Earnings   |  0 Jobs
Bid ID: 32894272  |  Submitted: Aug 21, 2012 09:37 ET 
Proposal SEALED

Eugenio S.      
Eugenio S.'s identity has been verified.  Learn More
 Costa Rica  |  
I'm an senior electronic engineer with more than eight years of experience working with FPGAs, HDLs, Digital Design, DSP, embedded, ... I have...
4
  |  
 5.0   |  Private   |  3 Jobs
Bid ID: 32874815  |  Submitted: Aug 20, 2012 15:32 ET 
Proposal SEALED

 China  |  
I am hardware designer and embedded programmer, and I hold my job dear. I have worked extremely successfully together with my friends for last...
1
  |  
 0.0   |  Private   |  0 Jobs
Bid ID: 32866716  |  Submitted: Aug 20, 2012 10:12 ET 
Proposal SEALED
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