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Avinash Venigalla | Elance
 
176985602337900
Last Sign-in: Sep 14, 2013

Avinash Venigalla

VLSI Verification Engineer
   India
  |   Labbipeta, Vijayawada

Overview

Minimum Hourly Rate $44

ASIC Design Engineer . Expertise in HDL coding . Strong background in backend design, timing analysis, layout, and designing for test at purposes. Excellent project management skills.Generating estimates of the time and resources required for implementation and testing.Good knowledge of analog and digital electronics and software development techniques . Thorough knowledge of high speed hardware design techniques

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Portfolio

Skills (6)

Tested
Perl
Digital Electronics
Digital Electronics Test
My Score
avg
Electronic Design
Integrated Circuits
VLSI
Semiconductor

Service Description

CMR Design Automation - Application Engineer.

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Education

SRM University
Master of Technology VLSI Design
-

Keywords

Seeking a challenging and rewarding contracts in ASIC/FPGA Design & Verification
My Snapshot
Elance Level
Level represents activity and experience on Elance. Freelancers start at Level 1 and achieve higher levels through their work. A higher "Level" indicates greater earnings, ratings and other achievements on Elance. Learn More »
  • 12 months
  • Lifetime
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Identity
Username
avinash1988
Type
Individual
Member Since
December 2011
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Avinash Venigalla | Elance

Avinash Venigalla