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Sudhanshu T. | Elance
 
176985602337900
Last Sign-in: Jul 18, 2014

Sudhanshu T.

   India
  |   Delhi, Delhi

Overview

Minimum Hourly Rate $5

Hello
Myself Sudhanshu Tripathi working as Design Engineer.
I have 1Year experience in EDA field. I have done B.tech(Electronics and Communication) in 2012.
List of technical skills:
HDL/HVL : Verilog, System Verilog, UVM

EDA Tools : Questa SIM, Xilinx ISE, Synplify Pro, Quartus, VCS.

Scripting : Perl, TCL/TK, Shell Scripting.

Software Languages : C, XML, JavaScipt

OS familiar with : Windows, Linux(RHEL, CentOS, Ubuntu)

Read More »

Skills (9)

Tested
uvm
system verilog
Overview  |  Job History  |  Resume/C.V.

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er_sud
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Member Since
July 2014
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Sudhanshu T. | Elance

Sudhanshu T.