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Ashot K. | Elance
 
176985602337900
Last Sign-in: Apr 18, 2014

Ashot K.

FPGA/CPLD and AVR FW design, analog
   Armenia
  |   Yerevan, Yerevan
  |  5:30 pm Local Time

Overview

Minimum Hourly Rate $15

Me: FW design in Verilog/SystemVerilog.
Have also C++, perl skills.
Electronics since 1978, HDL since 1998.
Industry: ATE.
Group: also analog design

Read More »
Dec 23, 2013|Electrical|Private|Completed
Dec 18, 2013|Electrical|Private|Working
Jun 21, 2012|Electrical|Private|Completed
|
5.0
May 9, 2012|CAD|Private|Completed
|
5.0

View All »

Portfolio

Used as solenoid valve supply power (12V, 280mA)
Power supply PCB layout, PSWa
JTAG adapter: Xilinx ribbon cable to custom PCB
Data IO PCB w/opto-insulation
Power source: -150V, +140V, +40V, +12V, +5V
Some links to the videos - devices in operation

Skills (5)

Tested
Electronic Design
Electronic Design Test
My Score
avg
Digital Electronics
Digital Electronics Test
My Score
avg
Analog Electronics
Analog Electronics Test
My Score
avg
Windows XP
Windows XP Test
My Score
avg
English-Russian Translation
English To Russian Translation Skills Test
My Score
avg
Passed
Russian To English Translation Skills Test
My Score
avg
Passed

Service Description

Design and test in Verilog, SystemVerilog (Cadence IUS).
FPGAs, CPLDs, Xilinx ISE, Altera Quartus, ATMEL microcontrollers, analog electronics.
Analog parts of Automated Test Equipment related designs.

Read More »

Keywords

Verilog
FPGA
CPLD
FW
AVR
microcontroller
analog
My Snapshot
Elance Level
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  • 12 months
  • Lifetime
Jobs
1
1
0
Total
Milestones
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Reviews
Recommend
Clients
Total
Repeat
Earnings
Private
Private
Total
Per Client
Identity
Username
fw_design
Type
Individual
Member Since
September 2010
Elance URL
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Ashot K. | Elance

Ashot K.