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Layne Flake | Elance
 
176985602337900
Last Sign-in: Jun 5, 2015

Layne Flake

   United States
  |   Portland, OR

Overview

I have been focused on computers and electronics both as a hobbyist and a professional ever since I used my savings from a paper route to buy an Apple IIe when I was 12 years old.

I have nearly two decades of experience in wide-ranging high-speed hardware designs, and I have successfully taken more than a dozen projects through from design planning to production.


Some areas of expertise:

--- Front-end Verilog RTL design of ASICs, FPGAs, and CPLDs

--- High-speed electrical and optical interfaces (speeds up to 40 gigabits per second)...

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Skills (4)

Tested
Verilog
FPGA
RTL Design
VHDL

Employment

Seeking New Position
ASIC / FPGA Design Engineer
2015 - Present
---Front-end design using Verilog ---System architecture ---Translating functional specifications into design requirements --- Experience with microprocessors and multiple data intefaces...
Intel Corporation
Senior Hardware Design Engineer
2001 - 2015
--- Individually designed and simulated with Verilog, and tested in-system, a 10 Gigabit Ethernet FPGA prototype --- Team leader for post-silicon system validation for 10 Gigabit Ethernet ASIC...
Interactive Silicon
Digital Hardware Design Engineer
1999 - 2001
--- Verilog designer for ASIC initialization logic and I2C interface --- Synthesized ASIC as FPGA prototype and debugged in the lab --- Pre-silicon static timing analysis of ASIC ---...
Interphase Corporation
Digital Hardware Design Engineer
1996 - 1999
--- Verilog designer for two PCI interface ASICs, for TCP checksum logic in another ASIC, and for a synchronous DRAM interface FPGA --- Debugged Altera's PCI soft-IP core and designed a...

Education

The Ohio State University
Master of Science (M.S.)
-
Brigham Young University
Bachelor of Science (B.S.)
-
Overview  |  Job History  |  Resume/C.V.

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Member Since
April 2015
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Layne Flake | Elance

Layne Flake