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Muhammad Akhtar | Elance
 
176985602337900
Last Sign-in: Jul 11, 2014

Muhammad Akhtar

ASIC / FPGA Design / Verification professional
   Pakistan
  |   Islamabad, Ict
  |  12:23 pm Local Time

Overview

Minimum Hourly Rate $20

Eight Years Experience in Semiconductor Industry

Specialties

ASIC / FPGA Front End Design, Verification
FPGA Design for DSP

SystemVerilog, VERILOG and VHDL,

Synopsys Design Compiler, IC Compiler, VCS.

Xilinx ISE , Vivado, Xilinx Chipscope Pro.

Cadence Virtuoso, NC-Verilog, Simvision, SoC Encounter

Mentor Graphics ModelSim 10, Questa Sim, Calibre Design REV, DRC, LVS, PEX.

Read More »
Jun 25, 2014|Electrical|Private|Completed
|
5.0
Jun 4, 2014|Other - Engineering & Manufacturing|Private|Completed
|
5.0
May 15, 2014|Other - Engineering & Manufacturing|Private|Completed
|
5.0
May 13, 2014|Electrical|Private|Completed
|
5.0

View All »

Skills (10)

Tested
Embedded Systems
Circuit Design
Digital Electronics
Digital Electronics Test
My Score
avg
Digital Signal Processing
Electronic Design
Integrated Circuits
PCB Design
Semiconductor
USB Electronics
VLSI
VLSI Test
My Score
avg

Service Description

ASIC Verification using UVM / VMM
ASIC / FPGA RTL Design

Digital ASIC Design, FPGA Design,
ASIC Synthesis / STA using Synopsys / Cadence tools.

RTL Design, Synthesis, Place and Router, Logic and Timing Simulation in VERILOG and VHDL for Xilinx FPGAs

PCB Design for FPGAs using Orcad / Altium.
I have access to latest EDA tools for Synopsys / Cadence i.e. Synopsys Design Compiler / IC Compiler / VCS-MS / Leda / Synplify Premier / Cadence Incisive / Soc Encounter / Xilinx ISE / Vivado / Modelsim / Questasim.


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Employment

Open Silicon
Principal Design Engineer
2012 - 2013
ASIC Synhesis (Synopsys Design Compiler) ASIC DFT (Synopsys Design Compiler) ASIC STA (Synopsys Design Compiler) ASIC Varification (Synopsys VCS + UVM)

Education

Portland State University
MS ECE
2007 - 2009

Keywords

UVM / SystemVerilog / Verilog / VHDL
Xilinx Planahead Vivado ISE
Cadence
Synopsys Design Compiler
VCS
Leda
Mentor Graphics Questa Modelsim
ASIC / FPGA
MATLAB
DSP
My Snapshot
7
Elance Level
Level represents activity and experience on Elance. Freelancers start at Level 1 and achieve higher levels through their work. A higher "Level" indicates greater earnings, ratings and other achievements on Elance. Learn More »
  • 12 months
  • Lifetime
Jobs
5
5
0
Total
Milestones
Hours
Reviews
5.0
Recommend
Clients
Total
Repeat
Earnings
Private
Private
Total
Per Client
Identity
Username
muhammadali201
Type
Individual
Member Since
January 2010
Elance URL
Verifications
0
Muhammad Akhtar | Elance

Muhammad Akhtar