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Roman D. | Elance
 
176985602337900
Last Sign-in: Dec 9, 2014

Roman D.

Hardware Design Engineer
   Russia

Overview

2 year expirience in hardware design industry (VLSI, FPGA) strong skills in Verilog HDL, Altera/Xilinx tools. Storng skills in Python. Have an expirience with perl, bash. Expirience in c++ and systemc languages for hardware simulation.

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Skills (7)

Tested
SystemC
Verilog
Overview  |  Job History  |  Resume/C.V.

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RomanDmnk
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October 2014
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Roman D. | Elance

Roman D.