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Przemyslaw S. | Elance
 
176985602337900
Last Sign-in: Feb 16, 2015

Przemyslaw S.

vv craft
   Poland
  |  1:58 pm Local Time

Overview

VHDL and Verilog coding, verification, synthesis.
Digital circuits design for ASIC and FPGA.
Architectures for computing, data processing and communication.
10+ years experience in industry, science and education.

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Skills (6)

Tested
Digital Electronics
VLSI
Electronic Design
Digital Signal Processing
Circuit Design
C

Service Description

PRIMARY --------------------------------------------------------------------

Coding - VHDL and Verilog

Code verification, analysis, reuse, redesign, reverse engineering
Synthesis for FPGA and prototyping (Xilinx and Altera).

Architecture design for computing, DSP, communication.

SECONDARY ---------------------------------------------------------------

Microprocessor programming - ARM, ATMEL; assembler & C.

Algorithms development, data processing, sensor matrices,
Special interest in neural networks and fuzzy processing.

Scientific and technical writing.

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Employment

Private held design house
Senior FPGA designer
2013 - Present
RTL conceptual design, VHDL coding and verification, IP cores (Xilinx and Altera), FPGA prototyping and production sign-off, technical writing.
Wroclaw University of Technology, Poland
Assistant Professor
1999 - 2013
(permanent) Research and teaching: digital circuits design & VHDL, microcontrollers (Atmel, ARM, Renesas), neural and fuzzy processing, sensor systems.
FirstPass Eng., USA
Engineer
2011 - 2011
(fixed-task contract) digital electronics for aircrafts - VHDL code compliance audit, clock domain crossing metastability analysis.
Honeywell Aerospace, Czech/USA
Senior ASIC Engineer
2009 - 2009
(fixed-time contract) digital electronics for aircrafts - reuse, redesign, reverse engineering.
FirstPass Eng., USA
Engineer
2009 - 2009
(fixed-task contract) digital electronics for aircrafts - reuse, redesign, reverse engineering.
University of Limerick, Ireland
Research Fellow / Part Time Lecturer
2005 - 2006
(fixed-time contract) Laser Doppler Vibrometry. DSP programming (synthetic heterodyne), CMOS camera, optical benches, lasers control. And some teaching.
Silicon and Software Systems, Dublin, Ireland
Electronic Design Engineer
1998 - 1999
(fixed-time contract) Digital ASIC design, VHDL and Verilog, RTL coding, verification, synthesis, ARM programming, HW/SW cosimulation
IMEC, Leuven, Belgium
Junior research staff
1995 - 1995
(fixed time conract) Research on application of neural networks for gas sensor matrices responses processing.

Education

Wroclaw University of Technology, Poland
Ph.D. Electronics
- 1999
Wroclaw University of Technology, Poland
M.Sc. Electronics
- 1993

Keywords

VHDL Verilog FPGA Xilinx Altera ASIC electronics
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Username
vvcraft
Type
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Member Since
October 2011
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Przemyslaw S. | Elance

Przemyslaw S.